Michael Keating is a Synopsys Fellow in the companyís Advanced Technology Group. He has been with Synopsys for 10 years, focusing on IP development methodology, hardware and software design quality and low power design. He received his BSEE and MSEE from Stanford University and has more than 20 years experience in ASIC and system design. Starting with the Reuse Methodology Manual (RMM), which he co-authored, Mr. Keating has spent much of the last 10 years focused on improving design methodology.
David Flynn, an ARM R&D Fellow, has been with the company since 1991, specializing in System-on-Chip IP deployment and methodology. He is the original architect behind ARMís synthesizable CPU family and the AMBAģ on-chip interconnect standard. His current research focus is low-energy system-level design. Mr. Flynn holds a number of patents in on-chip bus, low power and embedded processing sub-system design and holds a BSc in Computer Science from Hatfield Polytechnic, UK.
Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability. His research interests include design for variability, defect analysis, and fault diagnosis, and he has published more than 50 technical papers. Dr. Aitken holds a Ph.D. degree from McGill University in Canada and is a senior member of the IEEE, and a former Associate Editor of IEEE Transactions on Computer-Aided Design.
Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design. His current focus is on the development of low power solutions. He has been involved in ASIC design and development for 20 years, specializing in processor-based designs for data and wireless communication applications. Mr. Gibbons holds a BSc in Physics, Applied Physics and Microelectronics from Nottingham University, UK.
Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation. Dr. Shi has successfully consulted on more than ten leading-edge commercial low power designs. He holds a Ph.D. degree from University of Kent at Canterbury, UK, and has published 47 papers in journals and international conferences. He was Chairman of IEEE Dallas Section in 2006 and Chairman of IEEE Circuits and System Society Dallas Chapter in 2004.